About

Viresh K. is a seasoned Principal Engineer with nearly 18 years of experience in EDA design flow automation. In his current role at Infineon, he is leading and managing a design automation team for Engineering flows. He has worked on CAD flows for Physical IP modelling and validation, technology file validation, IP benchmarking & correlation, EDA source validation, Memory compiler tiler, and more. He has also leveraged data analytics platforms to improve flow efficiency and developed general infrastructure tool to support various stages of Physical IP development. Viresh is highly skilled in core JAVA, C++, TCL, and Perl. He has also designed and developed web-based systems for Physical IP design space exploration, characterization, and delivery. At Infineon, he is responsible for the development and maintenance of in-house Memory Compiler Tiler & other related Web-based systems to facilitate the design, development, and distribution of Embedded Memory IPs. He has developed indigenous algorithms for blockage extraction during the LEF view generation and refactored & ported C++ based projects to keep them up-to-date. In his past roles at Infineon and ARM, Viresh has worked as a team leader in Design Flow Infrastructure team and managed project responsibilities for design, development & deployment for multiple embedded memory design, qualification & distribution tools. He has also designed and developed a Java/ANTLR based Application Software to automate the Spice simulation framework and automatic eDAR generation for I/O libraries. He has integrated with MySQL database (Java/Hibernate) to persist key statistical information originating from the library development flow and implemented & supported important modules of the standard cell and I/O library development flow. Viresh's tech stack includes Software Engineer, Integration, Web, Java, infra, Senior Software Engineer, test, and MySQL. With relevant experience of 19.04 years, he is a highly skilled engineer who has made significant contributions to the EDA design flow automation industry.